A 24Cxx serial EEPROM is the easiest chip on the bench to read — and the easiest one to get silently wrong. The clip goes on, the software reports success, and the file you saved is either the same 256 bytes repeated eight times or a write that never touched the array. Nothing in the tool tells you which.
What a 24Cxx Actually Is
A 24Cxx is an I²C serial EEPROM: eight pins, two wires, byte-writable, rated for a million write cycles and decades of retention. It shows up wherever a board needs to remember a little something across power cycles — monitor EDID data, TV and appliance control settings, dashboard mileage, charger and battery-gauge parameters, calibration constants.
It is not the 25-series SPI flash you dump for BIOS work. Same SOIC-8 body, same clip, completely different bus and pinout. An 8-pin part on a PC motherboard holding firmware means the CH341A SPI workflow instead; an 8-pin part next to an MCU on a control board that remembers settings is 24Cxx territory.
The number after 24C is capacity in kilobits, not bytes. A 24C02 is 2 Kbit = 256 bytes. A 24C16 is 2 KB. A 24C256 is 32 KB. That single detail causes half the confusion below.
AsProgrammer 2.1.2 — SPI, I²C and MicroWire in one tool
The project describes it as software to program memory chips over SPI, I²C and MicroWire, with support for CH341, CH347, FT232H, USBasp, Arduino and AvrIsp-mkII. You still need the CH341 driver first — it is mirrored, with the setup walkthrough, in our CH341A guide. No signup, no download manager, hash published so you can check the file you got is the file we host.
The Pins: Four Do the Work, Two Ruin the Day
Looking at the chip with pin 1 at the dot: 1, 2, 3 are A0, A1, A2; 4 is VSS (ground); 5 is SDA; 6 is SCL; 7 is WP; 8 is VCC. Power, ground, clock and data are the four that make it talk. WP and the address pins are the two that make it lie.
WP must be tied to VCC or VSS — the datasheets say so explicitly, and a floating WP on a clip is a coin flip you re-toss every time you reseat. Tie it low to write. On a live board, whatever the board does with WP wins unless you break the connection. The address pins are where the family stops being consistent, and that is the next section.
Pick the Wrong Part and the Dump Is Fiction
The tool does not probe the chip’s capacity — there is no JEDEC ID here like there is on SPI flash. You tell it what the chip is, and it sends the addressing scheme that part uses. Get it wrong and you still get a file.
| Device | Capacity | Address bytes | Page buffer | What A0–A2 do |
|---|---|---|---|---|
| 24C01 / 24C02 | 128 B / 256 B | 1 | 8 / 16 bytes | Device address — up to eight chips on one bus |
| 24C04 / 24C08 | 512 B / 1 KB | 1 + block bits | 16 bytes | A0 (and A1) become memory block bits, not device bits |
| 24C16 | 2 KB | 1 + 3 block bits | 16 bytes | Nothing — no internal connection |
| 24C32 / 24C64 | 4 KB / 8 KB | 2 | 32 bytes | Device address |
| 24C256 | 32 KB | 2 | 64 bytes | Device address |
Microchip’s 24AA16/24LC16B datasheet (DS20001703R) is blunt about the middle row: “Pins A0, A1 and A2 are not used by the 24XX16 (no internal connections)”, and the three bits that would have been the device address are block-select bits which “in effect, are the three Most Significant bits of the word address”. In plain bench terms: a 24C16 answers on all eight device addresses, and the memory above 256 bytes is reachable only if the software knows to walk those block bits.
So when someone reads a 24C16 with “24C02” selected, they get exactly 256 bytes — block 0 — and if the tool keeps reading it wraps and repeats. The chip is fine. The dump is a quarter of the truth, eight times over.
At the other end, the 24C256 sends a full 16-bit address in two bytes after the control byte — high byte (A14–A8), then low byte (A7–A0). Point a 1-byte scheme at it and the chip takes your data byte as the low half of the address. That is how a “successful” write scatters bytes across a page you never meant to touch.
The Part Nobody Covers: The Write-Protect Pin Lies to Your Programmer
Here is the failure that eats an afternoon. With WP held high, the chip does not reject the write. It acknowledges it.
From Microchip’s 24C02C datasheet (DS21202D): “If an attempt is made to write to the protected portion of the array when the hardware write protection has been enabled, the device will acknowledge the command but no data will be written. The write cycle time must be observed even if the write protection is enabled.” The 24LC256 datasheet (DS20001203W) says the same thing in its own words: “the device will acknowledge the command, but no write cycle will occur, no data will be written.”
Your programmer sees ACK on every byte, waits the write time, and reports done. Nothing was written.
Worse, the protected region is not standard across the family. On the 24C02C, WP tied to VCC protects the upper half of the array (080–0FF) — the bottom 128 bytes write normally. On the 24LC256, WP high protects the entire array (0000–7FFF). Same pin, same voltage, two different outcomes: on one part you get a clean refusal that looks like success, on the other you get a half-written chip that looks like success. If you have ever written a config back and had the board behave as if you’d only fixed some of it, this is the mechanism.
The 24LC256 also samples WP at the Stop bit of every write command; toggling it after that has no effect on the cycle already running. So “I lifted WP while it was writing” does not save the attempt.
The rule that follows is not optional: read the chip back and compare files. Verify is the only thing that distinguishes an ACK from a write.
Page Boundaries: Where a Good Write Corrupts Good Data
Writes go into a page buffer — 16 bytes on a 24C02C, 64 on a 24C256 — and the buffer does not spill into the next page. Both datasheets carry the same warning: if a page write crosses a physical page boundary, “the data wraps around to the beginning of the current page (overwriting data previously stored there), instead of being written to the next page.” The 24LC256 puts a number on it: send more than 64 bytes before the Stop condition and the address counter rolls over, overwriting what you just sent.
Then the chip needs time. Page write time is 5 ms maximum on the 24LC256 and 24LC16B; the older 24C02C specifies a 1 ms cycle. During that time the device deliberately does not acknowledge — which is how a well-written tool knows the cycle finished. That handshake is called acknowledge polling, and it is why a programmer that hammers bytes at a chip faster than the chip can commit them leaves holes at regular intervals.
If your verify fails every 16th or every 64th byte, stop suspecting the chip. That is a page-boundary or timing problem in how the data was sent.
Reading In Circuit: You Are Not Alone on That Bus
I²C is open-drain. As TI’s Understanding the I2C Bus (SLVA704) puts it, a device can only pull a line low or release it and let the pull-up resistor raise it — “no device may hold the bus high.” That is what makes clipping onto a live bus possible at all, and it is also what makes it unreliable.
Three things are sharing those two wires with you:
- The board’s MCU, which is usually the bus master and may be clocking the EEPROM while you are. Two masters, one bus, garbage. Hold the MCU in reset, or pull the chip.
- The board’s pull-up resistors, now in parallel with whatever your adapter provides. Effective pull-up drops, edges get ugly, reads become intermittent.
- Other slaves at the same address. Sensors and EEPROMs both live at 1010xxx-style addresses, and a 24C16 that answers on all eight of them is a very greedy neighbour.
Current is not the problem — the 24LC256 draws 1 mA maximum reading and 3 mA writing. Back-powering the rest of the board through your clip is, and it is the same trap covered in our SOIC-8 test clip guide: if the board lights up when you connect the clip, you are powering something you did not intend to.
Voltage deserves the same suspicion as on SPI flash. Within one family, 24AA and 24FC parts run 1.7–5.5 V while 24LC parts want 2.5–5.5 V — the letters matter more than the capacity. A stock CH341A drives its lines at 5 V, which most 24Cxx parts tolerate standalone, but not the 3.3 V devices sharing that board bus.
Diagnosing a Bad Read
| What you see | Most likely cause | What to do |
|---|---|---|
| No chip detected / no ACK | No power to the chip, clip on backwards, or the MCU is holding the bus | Check VCC at pin 8 on the clip, confirm pin 1, hold the MCU in reset |
| Dump is all FF | SDA never gets pulled low — no real contact on pin 5 | Reseat the clip, check for flux or conformal coating on the pins |
| Dump repeats every 256 bytes | Wrong part selected — a 24C04/08/16 read as a 24C02 | Select the actual part so the tool walks the block-select bits |
| File is smaller than the chip | Same cause, seen from the other side | Capacity is in kilobits: divide by 8 before you judge the file |
| Write reports success, data unchanged | WP tied high — the chip ACKs and writes nothing | Tie WP to ground and read back to compare |
| Verify fails every 16 or 64 bytes | Page boundary crossing or write cycle timing | Write in aligned page-sized chunks, let the tool poll for completion |
FAQ
Can I read a 24Cxx in circuit with a CH341A? Often yes, and more often than with SPI flash, because the EEPROM is usually a slave that goes quiet when nobody addresses it. Hold the board’s MCU in reset first. If the read changes between attempts, stop trusting it and desolder.
My 24C16 only reads 256 bytes — is the chip bad? Almost certainly not. It is organized as eight 256-byte blocks selected by bits in the control byte, and the tool is only reading block 0 because it thinks the chip is a 24C02.
Do I have to pull WP low myself? If you want to write, yes — or confirm the board already does. WP must be tied to one rail or the other; leaving it floating on a clip is how “it worked yesterday” happens.
Is this the chip that holds the BIOS? No. BIOS and UEFI live in 25-series SPI NOR flash. Same package, different bus — see our flashrom on Windows guide and the RT809H guide for that side of the bench.
Is a socket programmer better than a clip? For anything you are going to write, yes. A TL866II Plus or T48 in a ZIF socket removes contact resistance, bus contention and back-powering from the equation in one move — which is why the desolder-read-resolder route stays popular for 24Cxx work. If the chip is staying on the board, the socket route is off the table and contact quality becomes your whole job.
Where will I actually meet one of these? The most common 24Cxx on any bench is the one holding your monitor’s EDID — 128 bytes at the same address 0x50, behind the video connector. See fixing a monitor EDID for what those bytes mean and why the checksum has to be recomputed after a write.
Verdict
24Cxx work is cheap and fast right up until you trust the report instead of the file. Two habits cover almost every failure: select the exact part so the addressing scheme matches the silicon, and read back and compare so an acknowledged write has to prove it happened. The chips themselves are nearly indestructible; the reports about them are not.
Sources for the numbers above: Microchip datasheets DS21202D (24C02C), DS20001703R (24AA16/24LC16B/24FC16) and DS20001203W (24AA256/24LC256/24FC256), and Texas Instruments SLVA704, Understanding the I2C Bus. Checked August 2026.
