Last checked: 23 October 2026.

The CH347 is WCH’s 480 Mbit/s successor to the CH341A: SPI at up to 60 MHz, I2C, two UARTs, JTAG, and on the CH347F also SWD and a 1.8 V I/O rail. The catch on Windows 11 is that it is not one device. Every CH347 board shows up as two or more USB interfaces, each wanting a different driver, and the product ID (55DA to 55DE) tells you which mode the board was wired into. Get the mode wrong and no programmer software will ever list it.

This guide gives you the drivers, the mode table, the software that actually talks to the chip, and the five failures people hit, each tied to a real report.

⬇ AsProgrammer dregmod v5 (MIT, with CH347 support)

Windows 7 → 11 · CH347T, CH347F, CH341A, USBasp, FT232H, Bus Pirate · unmodified release zip

Download AsProgrammer dregmod v5

File: asprogrammer-dregmod-v5.zip · 28,672,060 bytes · 20 Aug 2026 · SHA-256: baeaea6afafcd8697f11891539b573fc9c5c841cc0c154540980e5cdc0e87b61 · unmodified mirror of github.com/therealdreg/asprogrammer-dregmod (release v5) · MIT license

The zip carries AsProgrammer.exe, CH347DLL.DLL and CH341DLL.DLL, plus WCH’s own installers under drivers/CH34X/ (CH341PAR.EXE, CH343SER.EXE). The release page lists a SHA-256 for every file inside; the numbers above are from that list, checked against the download.

What you need Version Where
CH341PAR.EXE, the SPI/I2C/JTAG driver (CH341, CH347, CH339) 2.6 · 24 Apr 2025 · 660 KB · WHQL wch-ic.com (official). The copy mirrored in the CH341A guide is the older 2.4 package; it also carries CH347DLL.DLL, but install 2.6 for a CH347.
CH343SER.EXE, the UART driver (CH347 serial half) 2.2 · 24 Jun 2026 · 679 KB · WHQL wch-ic.com (official)
flashrom for Windows with ch347_spi Dreg’s build (x64 and x86) GitHub (GPL-2.0)
OpenOCD with the ch347 JTAG/SWD driver xPack 0.12.0-7 (built from upstream master, Oct 2025) Mirrored with checksum in the CMSIS-DAP / WCH-LinkE guide

Install, in this order

  1. Unplug the programmer. Run CH343SER.EXE → Install. This covers the serial interface the chip always exposes.
  2. Run CH341PAR.EXE → Install. This is the one AsProgrammer, NeoProgrammer-style tools and WCH’s own library talk to. Its INF covers 1A86:55DB, 55DD and 55DE under the name USB HighSpeed-SPI/I2C… CH347T / CH347F (read out of CH341WDM.INF in the CH341A guide).
  3. Plug the board in and open Device Manager. In mode 1 you should see two entries: a COM port named USB-HiSpeed-SERIAL-A CH347 under Ports, and the CH347T SPI/I2C device under Interface. Those strings are the DeviceDesc values in CH343SER.INF 1.9.2024.09 and CH341WDM.INF.
  4. Unzip AsProgrammer, start it, open Hardware and pick CH347, not CH341A. Then Detect.
  5. If the Hardware menu finds nothing, do not reinstall drivers yet. Check the product ID first, with the table below.

The mode table: what each product ID means on Windows

Per the CH347 datasheet V1.4 (§5.2), the CH347T samples two pins at reset, DTR1 (pin 10) and RTS1 (pin 13), and the result sets both the function set and the default PID. The CH347F has no mode pins: it is always the 5-in-1 55DE and the driver switches functions. Device Manager → the device → Details → Hardware Ids shows the PID.

Hardware Id Chip / mode (DTR1, RTS1) USB interfaces exposed Driver per interface Programmer software sees it?
USB\VID_1A86&PID_55DA CH347T mode 0 (high, high) UART 0 + UART 1 CH343SER on both (COM ports “USB-HiSpeed-SERIAL-A/B CH347”) No. There is no SPI interface. Move the board’s mode jumper or solder bridge.
USB\VID_1A86&PID_55DB CH347T mode 1 (high, low) UART 1 + vendor SPI/I2C (interface 2) CH343SER (MI_00) + CH341PAR (SPI/I2C) Yes: AsProgrammer, flashrom ch347_spi, IMSProg. This is how retail “CH347T programmer” boards are wired (DTR1 pulled high, RTS1 pulled low, per the One Transistor schematic review).
USB\VID_1A86&PID_55DC CH347T mode 2 (low, high) UART 1 + SPI/I2C, both as HID None (Windows HID class) WCH’s HID library only. flashrom’s source marks HID mode “TODO”; AsProgrammer uses CH347DLL, which wants the vendor interface.
USB\VID_1A86&PID_55DD CH347T mode 3 (low, low) UART 1 + vendor JTAG CH343SER (MI_00) + CH341PAR, or WinUSB for OpenOCD OpenOCD (upstream driver, see below). No SPI: flashrom and AsProgrammer will not find a flash chip in this mode.
USB\VID_1A86&PID_55DE CH347F, 5-in-1 UART 0 + UART 1 + SPI/I2C (interface 4) + JTAG + SWD CH343SER (MI_00, MI_02) + CH341PAR Yes, everything above; also SWD. VIO pin accepts 1.8 to 3.3 V (1.2 V on lot 5 ≥ 4).
Diagram: CH347T modes 0 to 3 and the CH347F, with the product ID, interfaces and Windows driver for each
The five product IDs a CH347 can enumerate with, and which Windows driver claims each USB interface. Diagram by Tech Bench Lab, from datasheet V1.4 §5.2, CH343SER.INF and the flashrom and OpenOCD sources.

Two IDs that get mislabelled in open-source rule files: OpenOCD’s driver also probes 1A86:55E7 as “other chip”, and probe-rs’s udev rules list 55E8 as “the third product id WCH’s tools use”. In CH343SER.INF, 55E7 is the CH339 (USB-HiSpeed-SERIAL-A CH339) and 55E8 is the four-port CH9114. Neither is a CH347; if you see them, you have a different chip.

Which software actually drives a CH347

Software CH347 support since Modes it uses Notes, with source
AsProgrammer (nofeletru/UsbAsp-flash) 2.1.0, 7 Sep 2024 1 (SPI/I2C), F 2.1.1 saves the CH347 SPI speed; 2.1.2 (24 Jan 2025) adds Microwire on CH347T. Still the last upstream release.
AsProgrammer dregmod 3.11, 15 Nov 2023 (v5 current, 20 Aug 2026) 1, F Hosted above. Bundles CH347DLL.DLL and WCH’s installers; MIT.
flashrom ch347_spi Commit 0facf12 of 23 Oct 2022; first release v1.3.0 1 (interface 2), F (interface 4) Probes 55DB and 55DE only. spispeed= accepts 60M, 30M, 15M, 7.5M, 3.75M, 1.875M, 937.5K, 468.75K; default 15 MHz. Needs WinUSB on the SPI interface on Windows (Zadig), which breaks AsProgrammer until you roll back.
OpenOCD upstream Commit 7d0e125 of 14 Oct 2023, after the 0.12.0 release 3 (JTAG), F (JTAG + SWD) Not in any tagged tarball yet; only in builds from master such as xPack 0.12.0-7. Adapter config interface/ch347.cfg; speeds 468.75 kHz to 60 MHz.
WCH OpenOCD_CH347 + CH347FpgaDownloadTool GitHub WCHSoftGroup/ch347, 2022 3, F Older 0.11.0+dev fork, Windows binary. Xilinx bitstream and SPI-via-JTAG loading.
IMSProg (Linux, GPL-3) Supports CH347T v1.0 and v1.1 1 README notes “CH347T V1.1 – a device with a lower speed than the CH347T V1.0”.
NeoProgrammer Never. — Its last build, 2.2.0.10 of 2021, predates the chip; it drives CH341A and USBasp only (see the NeoProgrammer guide). Pages that sell “NeoProgrammer with CH347 support” are repacks.
WCH download page for CH341PAR.EXE showing version 2.6, 24 April 2025, application scope CH341, CH347, CH339
WCH’s official CH341PAR.EXE page, captured 23 October 2026: version 2.6, 660 KB, scope CH341 / CH347 / CH339. Screenshot of wch-ic.com.

The five failures, in the order to check them

1. AsProgrammer’s Hardware menu shows CH347 but Detect finds nothing, and Device Manager shows two COM ports. The board is in mode 0 (PID 55DA): two UARTs, no SPI. Retail programmer boards strap DTR1 high and RTS1 low for mode 1; dev-board style modules have a jumper or DIP for the two pins. Change it with the board unplugged; the chip reads the pins only at reset.

2. Chip ID reads 0x000000, 0xFFFFFF, or changes between reads. Clock too high for the wiring. flashrom defaults to 15 MHz, and One Transistor’s CH347T software test reports a 32 MB part reading in seconds at 15 MHz with writes taking about six minutes. With a SOIC-8 clip and 20 cm leads, start at 15 MHz or lower; use 30 and 60 MHz only on a socket. Then check the usual: clip orientation, pin 8 power, and the clip contact problems.

3. A 1.8 V flash (W25Q…JW, MX25U…, most laptop and phone parts) detects wrongly or not at all. The CH347T is 3.3 V only (datasheet §2.1: “Support only 3.3V power supply voltage”), so it needs a 1.8 V level adapter exactly like the CH341A. The CH347F is the one with a VIO pin: 1.8 to 3.3 V, and 1.2 V on lot 5 ≥ 4. If your board says CH347F, set its voltage selector before clipping on.

4. JTAG works on one board and not another, or OpenOCD warns about the chip version. The silicon has firmware revisions and they matter. WCH’s issue tracker records a chip that answered JTAG with twice the expected bits (issue 13: “two versions of the chip, 1.4x and 2.4x. In later one jtag works, but i2c in mode 3 stops working”) and a December 2022 CH347T that hung in the FPGA tool until replaced by a newer part marked “x041” (issue 32). OpenOCD’s driver reads bcdDevice and prints what it knows: below 2.41 JTAG is bit-banged only; 2.41 has “very weird clock timing”; 4.41 limits SWD to 1 MHz and drives SWDIO high for 392 ns after ACK (add a series resistor); 5.44 allows 5 MHz SWD. The OpenOCD manual says it outright: “WCH CH347T chips have rather poor performance with respect to the USB HS connection. Upgrade firmware to the latest version!” How to upgrade is not documented publicly; issue 55 asking for it was open as of September 2026.

5. flashrom says “CH347 not found” although AsProgrammer works. On Windows, flashrom uses libusb and needs WinUSB bound to the SPI interface (interface 2 on the T, 4 on the F), while AsProgrammer needs WCH’s CH341PAR on that same interface. They cannot coexist. Zadig to flashrom, then to go back: Device Manager → the WinUSB device → Uninstall with “delete the driver” ticked, replug, and CH341PAR takes over again. flashrom also refuses mode 2 (HID) by design and mode 3 (no SPI endpoint).

Linux and macOS, briefly

The UART half binds to WCH’s ch343 driver on Linux (the CH9102 / CH343 guide hosts it with a checksum); its ID table carries 55DA, 55DB, 55DD, 55DE and 55E7, interface 0 only. The SPI/I2C/JTAG half has no kernel driver: flashrom and OpenOCD open it through libusb, so you need a udev rule. OpenOCD’s 60-openocd.rules already lists 55DD and 55DE; probe-rs’s rules add 55E8. WCH’s own ch341par_linux SDK instead creates /dev/ch34x_pis* and works, per its README, with “ch347t mode1/mode3, ch347f”. For I2C EEPROMs with WCH’s official Windows tool, One Transistor found the clock fixed at 800 kHz and had “no luck reading I2C EEPROMs”; AsProgrammer handled them.

FAQ

CH341A or CH347: is the speed difference real? Yes. The CH341A is full-speed USB (12 Mbit/s); the CH347 is high-speed (480 Mbit/s) with SPI selectable up to 60 MHz. The practical ceiling is your wiring, not the chip, which is why 15 MHz is the sane default.

Do I need Zadig for a CH347? Only for flashrom or OpenOCD on Windows. AsProgrammer and WCH’s library want CH341PAR. Zadig and CH341PAR fight over the same interface.

My board is labelled “CH347T V1.1”. Is that the firmware version? No, that is the carrier board revision. The chip revision is bcdDevice in the USB descriptor: the REV_ part of the Hardware Ids line in Device Manager (REV_0241 = 2.41), or lsusb -v on Linux. OpenOCD prints it at start.

Related guides

Sources